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Wafer-Level Characteristic Variation Modeling Considering Systematic Discontinuous Effects
http://hdl.handle.net/10061/0002000655
http://hdl.handle.net/10061/000200065574a45914-e735-486c-a325-e89093c51dc1
| アイテムタイプ | 学術雑誌論文 / Journal Article(1) | |||||||||||||
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| 公開日 | 2024-10-30 | |||||||||||||
| タイトル | ||||||||||||||
| タイトル | Wafer-Level Characteristic Variation Modeling Considering Systematic Discontinuous Effects | |||||||||||||
| 言語 | ||||||||||||||
| 言語 | eng | |||||||||||||
| 資源タイプ | ||||||||||||||
| 資源タイプ | journal article | |||||||||||||
| アクセス権 | ||||||||||||||
| アクセス権 | open access | |||||||||||||
| 著者 |
NAGAO, Takuma
× NAGAO, Takuma
× NAKAMURA, Tomoki
× KAJIYAMA, Masuo
× EIKI, Makoto
× 井上, 美智子× 新谷, 道広 |
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| 抄録 | ||||||||||||||
| 内容記述タイプ | Abstract | |||||||||||||
| 内容記述 | Statistical wafer-level characteristic variation modeling offers an attractive method for reducing the measurement cost in large-scale integrated (LSI) circuit testing while maintaining test quality. In this method, the performance of unmeasured LSI circuits fabricated on a wafer is statistically predicted based on a few measured LSI circuits. Conventional statistical methods model spatially smooth variations in the wafers. However, actual wafers can exhibit discontinuous variations that are systematically caused by the manufacturing environment, such as shot dependence. In this paper, we propose a modeling method that considers discontinuous variations in wafer characteristics by applying the knowledge of manufacturing engineers to a model estimated using Gaussian process regression. In the proposed method, the process variation is decomposed into systematic discontinuous and global components to improve estimation accuracy. An evaluation performed using an industrial production test dataset indicates that the proposed method effectively reduces the estimation error for an entire wafer by over 36% compared with conventional methods. | |||||||||||||
| 書誌情報 |
en : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences 巻 E107.A, 号 1, p. 96-104, 発行日 2023-07-19 |
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| 出版者 | ||||||||||||||
| 出版者 | The Institute of Electronics, Information and Communication Engineers | |||||||||||||
| ISSN | ||||||||||||||
| 収録物識別子タイプ | EISSN | |||||||||||||
| 収録物識別子 | 1745-1337 | |||||||||||||
| 出版者版DOI | ||||||||||||||
| 関連タイプ | isReplacedBy | |||||||||||||
| 識別子タイプ | DOI | |||||||||||||
| 関連識別子 | https://doi.org/10.1587/transfun.2023KEP0010 | |||||||||||||
| 出版者版URI | ||||||||||||||
| 関連タイプ | isReplacedBy | |||||||||||||
| 識別子タイプ | URI | |||||||||||||
| 関連識別子 | https://www.jstage.jst.go.jp/article/transfun/E107.A/1/E107.A_2023KEP0010/_article/-char/ja | |||||||||||||
| 権利 | ||||||||||||||
| 権利情報 | $00A9 2024 The Institute of Electronics, Information and Communication Engineers | |||||||||||||
| 著者版フラグ | ||||||||||||||
| 出版タイプ | NA | |||||||||||||
